New Si5328 Precision Clock Multiplier and Jitter Attenuator Shrinks
the Cost and Complexity of Carrier Ethernet Switches and Routers
AUSTIN, Texas--(BUSINESS WIRE)--
Silicon
Labs (NASDAQ: SLAB), a leader in high-performance, analog-intensive,
mixed-signal ICs, today introduced the industry's lowest jitter, lowest
power and most frequency-flexible timing solution for high-speed
networking equipment based on the Synchronous Ethernet (SyncE) standard.
Offering an unmatched combination of any-frequency synthesis and
industry-leading jitter performance (as low as 263 femtoseconds RMS),
the new Si5328 precision clock multiplier and jitter attenuator
addresses the need for ultra-low jitter physical layer reference clocks
in Carrier Ethernet switches and routers. Eighty percent smaller and
also 80 percent more power efficient than competing SyncE clocks, the
Si5328 provides a best-in-class SyncE-compliant timing solution for edge
routers, multi-service switches, wireless backhaul systems, DSLAMs and
GPON/GEPON optical line termination (OLT) equipment.
The telecom infrastructure market is rapidly transitioning from legacy
SONET/SDH networks to higher-speed, more cost-effective Ethernet
networks. A key enabling technology behind this network transition is
Synchronous Ethernet, which is used to distribute accurate timing in
Gigabit Ethernet (GbE), 10 GbE, 40 GbE, and 100 GbE Carrier Ethernet
switches and routers. Every Carrier Ethernet switch and router requires
a high-performance SyncE clock to provide wander filtering, distribute
timing and provide a low-jitter Ethernet PHY reference clock. Silicon
Labs has addressed this application need with the industry's lowest
jitter, most frequency-flexible SyncE timing solution optimized for
Ethernet PHYs ranging from GbE to 100 GbE.
The Si5328 is fully compliant with ITU-T G.8262 SyncE clock requirements
including EEC Options 1 and 2. When paired with a Stratum 3
temperature-compensated crystal oscillator (TCXO), the Si5328 meets all
of the jitter, wander and holdover requirements specified by the SyncE
standard. With its integrated loop filter featuring selectable loop
bandwidths (0.1 Hz and 1 to 10 Hz), the Si5328 can be designed into any
networking system that must comply with SyncE specifications. This
integration eliminates the need for expensive discrete timing card
phase-locked loops (PLLs) in some systems and provides manufacturers the
assurance that their networking products can be deployed worldwide by
their end customers.
Leveraging Silicon Labs' patented DSPLL® technology, the
Si5328 SyncE clock can generate any output frequency ranging from 8 kHz
to 808 MHz and from any input frequency from 8 kHz to 710 MHz. This
unique frequency-flexible any-rate capability enables networking system
designers to synchronize to and generate virtually any legacy telecom or
SyncE frequency, simplifying system designs from GbE to 100 GbE. The
Si5328 can be digitally reconfigured through I2C or SPI
interfaces without the need for costly bill of materials (BOM) changes.
The Si5328 clock's high level of single-chip integration greatly
simplifies printed circuit board (PCB) design. Its DSPLL architecture
eliminates the need for external crystal and loop filter components,
reducing PCB area while also maximizing immunity to board-level noise.
Selectable output signal formats (LVPECL, LVDS, CML and CMOS) ease
interfacing with popular Ethernet transceivers and eliminate expensive
level shifters and other filtering components. Powered by a single 2.5
or 3.3 V supply, the Si5328 operates without the need for multiple power
supplies and discrete filtering required by competing SyncE timing
solutions.
"As today's telecom infrastructure rapidly migrates from legacy
standards to SyncE, equipment manufacturers require fully
SyncE-compliant timing solutions that not only offer low jitter
performance but also reduce design complexity and power consumption,"
said Mike Petrowski, vice president and general manager of Silicon Labs'
timing products. "Silicon Labs' new Si5328 clock multiplier offers the
most advanced SyncE timing solution available, giving designers an
unparalleled margin in jitter performance, BOM cost, footprint and
energy efficiency."
Pricing and Availability
Production quantities of Silicon Labs' SyncE Si5328 clocks are available
now in a compact 6 mm x 6 mm QFN package, as well as in two speed
grades. The Si5328C-C-GM supports clock outputs up to 346 MHz and is
priced at $7.50 (USD) in 10,000-unit quantities. The Si5328B-C-GM
supports clock outputs up to 808 MHz and is priced at $9.38 (USD) in
10,000-unit quantities. Silicon Labs offers an easy-to-use evaluation
platform to accelerate SyncE application development. The Si5328-EVB
evaluation board is priced at $250 (USD MSRP).
For more information about Silicon Labs' Si5328 SyncE clock multiplier
and jitter attenuator and to order samples and evaluation boards, visit www.silabs.com/timing.
About Silicon Labs' Timing IC Portfolio
Silicon Labs offers the industry's broadest "one-stop-shop" portfolio of
timing ICs including programmable XO/VCXOs, single-die MEMS oscillators
based on CMEMS® technology, frequency-flexible clock
generators, jitter-attenuating clocks, PCIe clocks, buffers and physical
layer timing devices. Leveraging Silicon Labs' patented DSPLL and
MultiSynth technologies, these timing ICs eliminate the need for many
expensive discrete components while improving performance, minimizing
board space and simplifying designs. To help developers get to market
faster, Silicon Labs offers easy-to-use web utilities that allow
custom-configuration of oscillators and clock generators. Timing IC
samples ship in less than two weeks, eliminating long lead times
associated with custom devices.
Silicon Labs
Silicon Labs is an industry leader in the innovation of
high-performance, analog-intensive, mixed-signal ICs. Developed by a
world-class engineering team with unsurpassed expertise in mixed-signal
design, Silicon Labs' diverse portfolio of patented semiconductor
solutions offers customers significant advantages in performance, size
and power consumption. For more information about Silicon Labs, please
visit www.silabs.com.
Cautionary Language
This press release may contain forward-looking statements based on
Silicon Labs' current expectations. These forward-looking statements
involve risks and uncertainties. A number of important factors could
cause actual results to differ materially from those in the
forward-looking statements. For a discussion of factors that could
impact Silicon Labs' financial results and cause actual results to
differ materially from those in the forward-looking statements, please
refer to Silicon Labs' filings with the SEC. Silicon Labs disclaims any
intention or obligation to update or revise any forward-looking
statements, whether as a result of new information, future events or
otherwise.
Note to editors: CMEMS, DSPLL, Silicon Laboratories, Silicon Labs, the
"S" symbol, the Silicon Laboratories logo and the Silicon Labs logo are
trademarks of Silicon Laboratories Inc. All other product names noted
herein may be trademarks of their respective holders.
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Silicon Labs
Dale Weisman, +1-512-532-5871
dale.weisman@silabs.com
Source: Silicon Labs
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